1. FIELD OF THE INVENTION
The present invention relates to a semiconductor controlled rectifier, and more particularly to a semiconductor controlled rectifier provided with an auxiliary electrode near the gate electrode.
2. DESCRIPTION OF THE PRIOR ART
A semiconductor controlled rectifier, which is turned on in response to a gating signal applied to the gate electrode, comprises a semiconductor substrate having at least four layers of P and N conductivity types, disposed alternately; a pair of main electrodes kept in ohmic contact with the outer surfaces of two outermost layers; and a gate electrode connected with one of the four layers of the substrate. If a gating signal is applied to the gate electrode of such a semiconductor controlled rectifieer with a forward voltage applied between the main electrodes, the four-layer region between the main electrodes is driven from its cut-off (non-conductive) state into its conductive state. The change of state from cut-off to conduction is termed "turn-on". A semiconductor controlled rectifier may be turned on by a signal other than a gating signal. For example, the turn-on of a semiconductor controlled rectifier takes place when the forward applied voltage across the device exceeds the maximum allowable voltage or when the rate of increase of the forward voltage, i.e., dv/dt is too great. The phenomenon that the device is turned on by a forward voltage lower than the maximum allowable voltage, makes it impossible for a four-or five-layer, three-or four-terminal device to be controlled in its turn-on operation by a gating signal so that it can not be used in a circuit which is operated at high frequency or draws a heavy current. If a semiconductor controlled rectifier is turned on when the rate of increase of the forward voltage, i.e. dv/dt, is rather small, then the semiconductor device is said, in this specification, to have a small dv/dt capability. If the dv/dt capability is small, it is necessary to reduce the rate of increase of the forward voltage applied between the main electrodes by connecting a capacitor between the main electrodes so as not to turn on the device before a gate signal is applied. In this case, the smaller is the dv/dt, the greater capacitance the capacitor must have. Consequently, the overall size of the device is larger than reasonable. Therefore, it is necessary to make the dv/dt capability as high as possible.
FIG. 1 shows a well-known four-layer three-terminal SCR (semiconductor controlled rectifier), i.e. thyristor, which has a large dv/dt capability. In FIG. 1, a semiconductor substrate 1 of four-layer structure has layers P.sub.E, N.sub.B, P.sub.B and N.sub.E. The layer N.sub.B has N-type conductivity and forms a base. The layers P.sub.E and P.sub.B have P-type conductivity, serve as an emitter and a base and form a first and a second PN junctions J.sub.1 and J.sub.2 with the layer N.sub.B. The layer N.sub.E has N-type conductivity and formed in the P-base layer P.sub.B to form a third PN junction with the layer P.sub.B. An anode electrode 2 and a cathode electrode 3 are disposed on the P-emitter layer P.sub.E and the N-emitter layer N.sub.E in ohmic contact therewith. A gate electrode 4 is connected with the surface of the P-base layer P.sub.B and a resistor 5 is connected between the cathode 3 and the gate 4.
Now, if a voltage with its positive polarity at the anode 2, i.e. a forward voltage, is applied between the anode 2 and the cathode 3 of a thyristor having such a structure as described above, the second PN junction J.sub.2 is inversely biased. Accordingly, the width of a depletion layer formed on both the sides of the PN junction J.sub.2 increases so that displacement current flows. The displacement current increases in proportion to the rate of increase of the forward applied voltage. Moreover, the increase of the forward applied voltage is accompanied by the increase in the leakage current through the second PN junction J.sub.2. The third PN junction J.sub.3 is forward biassed due to the displacement current and the leakage current so that carriers are injected from the N-emitter layer N.sub.E into the P-base layer P.sub.B. The degree of the third PN junction J.sub.3 being forward-biased is greater at the peripheral portion of the N-emitter layer N.sub.E where the displacement current and the leakage current from the second PN junction J.sub.2 which are not in registration with the N-emitter layer N.sub.E concentrate, than at the central portion of the layer N.sub.E. Accordingly, if the rate of increase in the forward applied voltage is high enough, the thyristor is erroneously turned on due to the local turn-on phenomenon taking place at the peripheral portion of the N-emitter layer N.sub.E. The resistor 5 connected between the cathode 3 and the gate electrode 4, as shown in FIG. 1, enables the displacement and the leakage currents near the gate electrode 4 to flow through the gate electrode 4 and the resistor 5 into the cathode 3 so that the degree of the third PN junction J.sub.3 being forward biased decreases to suppress the erroneous turn-on action to a certain extent. In this case, the smaller is the value of the resistor 5, the greater are the displacement current and the leakage current flowing through the resistor 5 into the cathode 3, so that the effect of suppressing the erroneous turn-on increases. However, if the value of the resistor 5 decreases, the current of the gating signal is by-passed through the resistor 5 to decrease the effective gating current. Therefore, a large-current gating signal is needed to effectively turn the thyristor on. This is one of the drawbacks of a conventional thyristor.
The leakage current of an SCR at its forward OFF-state is determined depending upon the temperature of the SCR. Accordingly, if the temperature of the device rises and the device is kept at high temperatures, the leakage current increases to turn on the device before a gating signal is applied. Thus, temperature has the same effect as in case where the dv/dt is high. Consequently, the attempts to avoid the effect is necessarily accompanied by the same drawback as is incurred in case of improving the dv/dt capability.